Compact modeling of through silicon vias for thermal analysis in 3-D IC structures
Crossref DOI link: https://doi.org/10.1007/s12046-020-01549-1
Published Online: 2021-02-05
Published Print: 2021-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
PATIL, CHANDRASHEKHAR V https://orcid.org/0000-0003-1476-7467
SUMA, M S
Text and Data Mining valid from 2021-02-05
Version of Record valid from 2021-02-05
Article History
Received: 26 November 2019
Revised: 8 October 2020
Accepted: 19 November 2020
First Online: 5 February 2021