A Novel and Reduced CPU Time Modeling and Simulation Methodology for Path Planning Based on Resistive Grids
Crossref DOI link: https://doi.org/10.1007/s13369-018-3497-3
Published Online: 2018-08-09
Published Print: 2019-03
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Hernández-Mejía, Carlos http://orcid.org/0000-0003-2481-8723
Vázquez-Leal, Héctor
Sánchez-González, Alfonso
Corona-Avelizapa, Ángel
Text and Data Mining valid from 2018-08-09
Article History
Received: 15 December 2017
Accepted: 1 August 2018
First Online: 9 August 2018