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Design of Low-Power CMOS VCO with Three Transistors NAND Gate and MOS Varactor

Crossref DOI link: https://doi.org/10.1007/s40031-023-00898-9

Published Online: 2023-05-20

Published Print: 2023-08

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Kumar, Manoj https://orcid.org/0000-0002-1863-4189
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Text and Data Mining valid from 2023-05-20

Version of Record valid from 2023-05-20
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Article History

Received: 22 May 2021

Accepted: 7 May 2023

First Online: 20 May 2023

Declarations

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: The author has no conflicts of interest to declare that are relevant to the content of this article.