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Design and performance analysis of buffer inserted on-chip global nano interconnects in VDSM technologies

Published Online: 2022-05-11

Published Print: 2022-09

Authors

Venkataiah, C.

Ramanjaneyulu, N.

Rao, Y. Mallikarjuna

Prakash, V. N. V. Satya

Murthy, M. K. Linga

Rao, N. Sreenivasa
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Text and Data Mining valid from 2022-05-11

Version of Record valid from 2022-05-11
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Article History

Received: 19 November 2021

Accepted: 27 February 2022

First Online: 11 May 2022

Document is current