An area-efficient DSP-free modular exponentiation architecture for resource-constrained FPGAs
Crossref DOI link: https://doi.org/10.1007/s44444-025-00031-9
Published Online: 2025-09-26
Published Print: 2025-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Wijesinghe, W. A. Susantha https://orcid.org/0000-0002-8485-5369
Text and Data Mining valid from 2025-09-26
Version of Record valid from 2025-09-26
Article History
Received: 15 April 2025
Accepted: 2 August 2025
First Online: 26 September 2025
Declarations
:
: The author declares no competing interests.