An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation
Crossref DOI link: https://doi.org/10.1007/978-981-10-7470-7_27
Published Online: 2017-12-21
Published Print: 2017
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Pandey, Jai Gopal
Goel, Tarun
Karmakar, Abhijit
License valid from 2017-01-01