Automatic Synthesis of Boolean Expression and Error Detection from Logic Circuit Sketches
Crossref DOI link: https://doi.org/10.1007/978-981-13-0020-2_36
Published Online: 2018-04-26
Published Print: 2018
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Dhiman, Sahil
Garg, Pushpinder
Sharma, Divya
Chattopadhyay, Chiranjoy
License valid from 2018-01-01