Area-Delay and Energy-Efficient Throughput-Scalable VLSI Architecture for SDR Channelizer
Crossref DOI link: https://doi.org/10.1007/s00034-015-0183-5
Published Online: 2015-10-20
Published Print: 2016-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Mohanty, Basant Kumar
Singhal, Subodh Kumar http://orcid.org/0000-0002-1136-1421
Text and Data Mining valid from 2015-10-20