Non-binary LDPC Decoders Design for Maximizing Throughput of an FPGA Implementation
Crossref DOI link: https://doi.org/10.1007/s00034-015-0235-x
Published Online: 2016-01-12
Published Print: 2016-11
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Sułek, Wojciech
Funding for this research was provided by:
Polish National Science Centre (4698/B/T02/2011/40)
Text and Data Mining valid from 2016-01-12