Digital twin based FPGA implementation of FIR filter for multi-bit soft computing error detection and correction for industrial applications
Crossref DOI link: https://doi.org/10.1007/s00500-022-07371-7
Published Online: 2022-08-29
Published Print: 2023-04
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Savalam, Chandrasekhar
Alapati, Venkata Nagaratna Tilak
Text and Data Mining valid from 2022-08-29
Version of Record valid from 2022-08-29
Article History
Accepted: 3 June 2022
First Online: 29 August 2022
Declarations
:
: The authors declare that they have no conflict of interest.
: Not Applicable.