CFCS calibration circuit design for multi-bit pipelined ADC architectures
Crossref DOI link: https://doi.org/10.1007/s00542-018-3887-1
Published Online: 2018-04-09
Published Print: 2018-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Gupta, Hari Shanker
Mohapatra, Satyajit
Pandya, Nisha
Mohapatra, Nihar
Vasoliya, Rohit
Mehta, Sanjeev
Chowdhury, Arup Roy
Text and Data Mining valid from 2018-04-09
Article History
Received: 29 March 2018
Accepted: 30 March 2018
First Online: 9 April 2018