A low-jitter third-order self-biased PLL with adaptive fast-locking scheme for SerDes interfaces
Crossref DOI link: https://doi.org/10.1007/s10470-015-0615-y
Published Online: 2015-08-04
Published Print: 2015-11
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Zhang, Hong
Du, Xin
Zhang, Yao
Gong, Liao
Cheng, Jun
Funding for this research was provided by:
National Natural Science Foundation of China (61474092)
Text and Data Mining valid from 2015-08-04