An improved high speed, and low voltage CMOS current mode logic latch
Crossref DOI link: https://doi.org/10.1007/s10470-016-0875-1
Published Online: 2016-11-25
Published Print: 2017-01
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Lozada, Oscar http://orcid.org/0000-0003-0554-6996
Espinosa, Guillermo
License valid from 2016-11-25