Digital background calibration algorithm and its FPGA implementation for timing mismatch correction of time-interleaved ADC
Crossref DOI link: https://doi.org/10.1007/s10470-019-01443-9
Published Online: 2019-03-22
Published Print: 2019-05
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Abbaszadeh, Asgar
Aghdam, Esmaeil N.
Rosado-Muñoz, Alfredo
Text and Data Mining valid from 2019-03-22
Article History
Received: 8 June 2018
Revised: 6 February 2019
Accepted: 14 March 2019
First Online: 22 March 2019