Ultra high speed and novel design of power-aware CNFET based MCML 3-bit parity checker
Crossref DOI link: https://doi.org/10.1007/s10470-020-01609-w
Published Online: 2020-03-04
Published Print: 2020-09
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Srivastava, Pragya
Yadav, Richa
Srivastava, Richa
Text and Data Mining valid from 2020-03-04
Version of Record valid from 2020-03-04
Article History
Received: 10 October 2019
Revised: 10 October 2019
Accepted: 22 February 2020
First Online: 4 March 2020