System-level design based on UML/MARTE for FPGA-based embedded real-time systems
Crossref DOI link: https://doi.org/10.1007/s10617-016-9172-6
Published Online: 2016-03-09
Published Print: 2016-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Leite, Marcela
Wehrmeister, Marco Aurélio http://orcid.org/0000-0002-1415-5527
Funding for this research was provided by:
National Council for Scientific and Techno- logical Development (CNPq-Brazil) (480321/2011-6)
Text and Data Mining valid from 2016-03-09