Model-based design verification for embedded systems through SVOCL: an OCL extension for SystemVerilog
Crossref DOI link: https://doi.org/10.1007/s10617-017-9182-z
Published Online: 2017-02-21
Published Print: 2017-03
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Anwar, Muhammad Waseem
Rashid, Muhammad
Azam, Farooque
Kashif, Muhammad
Funding for this research was provided by:
NSTIP, Saudi Arabia (SA) (Grantno.13-INF761-10)
License valid from 2017-02-21