An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology
Crossref DOI link: https://doi.org/10.1007/s10836-016-5586-0
Published Online: 2016-04-29
Published Print: 2016-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Chen, Qingyu
Wang, Haibin
Chen, Li
Li, Lixiang
Zhao, Xing
Liu, Rui
Chen, Mo
Li, Xuantian
Text and Data Mining valid from 2016-04-29