Area-Efficient and Reliable Error Correcting Code Circuit Based on Hybrid CMOS/Memristor Circuit
Crossref DOI link: https://doi.org/10.1007/s10836-020-05892-3
Published Online: 2020-07-19
Published Print: 2020-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Ishizaka, Mamoru http://orcid.org/0000-0001-5799-872X
Shintani, Michihiro
Inoue, Michiko
Funding for this research was provided by:
Japan Society for the Promotion of Science (18K18025)
Text and Data Mining valid from 2020-07-19
Version of Record valid from 2020-07-19
Article History
Received: 2 March 2020
Accepted: 1 July 2020
First Online: 19 July 2020