Mathematical programming models for scheduling in a CPU/FPGA architecture with heterogeneous communication delays
Crossref DOI link: https://doi.org/10.1007/s10845-015-1075-z
Published Online: 2015-04-07
Published Print: 2018-03
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Ait El Cadi, Abdessamad
Souissi, Omar
Ben Atitallah, Rabie
Belanger, Nicolas
Artiba, Abdelhakim
Text and Data Mining valid from 2015-04-07