Compressing three-dimensional sparse arrays using inter- and intra-task parallelization strategies on Intel Xeon and Xeon Phi
Crossref DOI link: https://doi.org/10.1007/s11227-016-1820-x
Published Online: 2016-07-21
Published Print: 2017-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Lin, Chun-Yuan
Yen, Huang Ting
Hung, Che-Lun
License valid from 2016-07-21