Technology-Optimized Fixed-Point Bit-Parallel Multipliers for FPGAs
Crossref DOI link: https://doi.org/10.1007/s11265-016-1195-5
Published Online: 2016-10-24
Published Print: 2017-11
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Khurshid, Burhan
License valid from 2016-10-24