VerCoLib: Fast and Versatile Communication for FPGAs via PCI Express
Crossref DOI link: https://doi.org/10.1007/s11265-019-01465-6
Published Online: 2019-07-16
Published Print: 2020-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Sezenlik, Oğuzhan
Schüller, Sebastian
Anlauf, Joachim K.
Text and Data Mining valid from 2019-07-16
Version of Record valid from 2019-07-16
Article History
Received: 10 September 2018
Revised: 6 March 2019
Accepted: 25 June 2019
First Online: 16 July 2019