P-NoC: Performance Evaluation and Design Space Exploration of NoCs for Chip Multiprocessor Architecture Using FPGA
Crossref DOI link: https://doi.org/10.1007/s11277-020-07529-2
Published Online: 2020-06-19
Published Print: 2020-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Parane, Khyamling http://orcid.org/0000-0003-4176-4640
Prabhu Prasad, B. M.
Talawar, Basavaraj
Funding for this research was provided by:
Ministry of Electronics and Information Technology, Government of India (DIC/MUM/GA/10(37)D)
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Article History
First Online: 19 June 2020