An FPGA implementation of a tone mapping algorithm with a halo-reducing filter
Crossref DOI link: https://doi.org/10.1007/s11554-016-0635-6
Published Online: 2016-09-21
Published Print: 2019-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Ambalathankandy, Prasoon http://orcid.org/0000-0002-9855-5527
Horé, Alain
Yadid-Pecht, Orly
Text and Data Mining valid from 2016-09-21
Article History
Received: 18 January 2016
Accepted: 26 August 2016
First Online: 21 September 2016