On-chip programmable pulse processor employing cascaded MZI-MRR structure
Crossref DOI link: https://doi.org/10.1007/s12200-018-0846-5
Published Online: 2018-10-24
Published Print: 2019-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Zhao, Yuhe
Wang, Xu
Gao, Dingshan
Dong, Jianji
Zhang, Xinliang
Text and Data Mining valid from 2018-10-24
Article History
Received: 8 July 2018
Accepted: 10 August 2018
First Online: 24 October 2018