Vertically Extended Drain Double Gate Si1−xGex Source Tunnel FET : Proposal & Investigation For Optimized Device Performance
Crossref DOI link: https://doi.org/10.1007/s12633-020-00603-1
Published Online: 2020-07-28
Published Print: 2021-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Raj, Anand
Singh, Sangeeta
Priyadarshani, Kumari Nibha
Arya, Rajeev
Naugarhiya, Alok
Text and Data Mining valid from 2020-07-28
Version of Record valid from 2020-07-28
Article History
Received: 8 April 2020
Accepted: 13 July 2020
First Online: 28 July 2020