Patil, Suvarna M.
Kundale, Somnath S.
Sutar, Santosh S.
Patil, Pramod J.
Teli, Aviraj M.
Beknalkar, Sonali A.
Kamat, Rajanish K.
Bae, Jinho
Shin, Jae Cheol
Dongale, Tukaram D.
Funding for this research was provided by:
Bharati Vidyapeeth Deemed to be University (2021-22)
MAHAJYOTI Fellowship
Shivaji University, Kolhapur ('Research Strengthening Scheme: 2021-22')
RUSA-Industry Sponsored Centre for VLSI System Design
National Research Foundation of Korea (2020R1A2C1015206)
Article History
Received: 24 December 2022
Accepted: 23 March 2023
First Online: 25 March 2023
Competing interests
: The authors declare no competing interests.