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Implementation of binarized neural networks immune to device variation and voltage drop employing resistive random access memory bridges and capacitive neurons

Crossref DOI link: https://doi.org/10.1038/s44172-024-00226-z

Published Online: 2024-06-18

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Ezzadeen, Mona https://orcid.org/0000-0003-2170-5862
Majumdar, Atreya

Valorge, Olivier

Castellani, Niccolo

Gherman, Valentin

Regis, Guillaume

Giraud, Bastien

Noel, Jean-Philippe

Meli, Valentina

Bocquet, Marc

Andrieu, Francois

Querlioz, Damien https://orcid.org/0000-0002-0295-1008
Portal, Jean-Michel
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Text and Data Mining valid from 2024-06-18

Version of Record valid from 2024-06-18
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Article History

Received: 9 January 2023

Accepted: 3 June 2024

First Online: 18 June 2024

Competing interests

: The authors declare no competing interests. Damien Querlioz is an Editorial Board Member in Communications <i>Engineering</i>, but was not involved in the editorial review of, nor the decision to publish this article.

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