Lu, Xiaoyu http://orcid.org/0000-0003-2426-1427
Wang, Yunmiao http://orcid.org/0000-0001-8194-4166
Liu, Zhuohe http://orcid.org/0000-0002-1818-646X
Gou, Yueyang http://orcid.org/0000-0002-8444-8069
Jaeger, Dieter http://orcid.org/0000-0002-5122-1319
St-Pierre, François http://orcid.org/0000-0001-8618-4135
Article History
Received: 23 August 2022
Accepted: 20 September 2023
First Online: 12 October 2023
Competing interests
: The authors declare the following competing interest: FSP is an inventor on a US patent (#US9606100 B2) that encompasses the design and specific uses of voltage indicators that share the same architecture as the JEDI-1P indicator discussed in this article. Leland Stanford Junior University is the patent applicant and current assignee. Co-inventor MZ Lin is not an author on this paper. There are no other competing interests.