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Adaptive equalizer with a controller of a minimally admissible differential voltage of the output signal and pseudodifferential cascode output buffer for the 10-Gb/s transmitter according to the 65-nm CMOS technology

Crossref DOI link: https://doi.org/10.1134/S1063739715050066

Published Online: 2015-11-04

Published Print: 2015-11

Update policy: https://doi.org/10.1007/springer_crossmark_policy

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