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A Novel Technique to Design GNRFET Based Ternary Logic Circuits for High-Performance Applications

Published Online: 2024-11-21

Published Print: 2024-10

Authors

Venkatramana, P.

Basha, Shaik Javid

Sankarnath, V.

Rao, Y. Mallikarjuna

Subramanyam, M. V.
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Text and Data Mining valid from 2024-10-01

Version of Record valid from 2024-10-01
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Article History

Received: 14 May 2024

Revised: 10 June 2024

Accepted: 10 June 2024

First Online: 21 November 2024

CONFLICT OF INTEREST

: The authors of this work declare that they have no conflicts of interest.

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