A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process
Crossref DOI link: https://doi.org/10.1186/s11671-017-2191-9
Published Online: 2017-06-15
Published Print: 2017-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Hsu, Meng-Yin http://orcid.org/0000-0002-1201-0092
Liao, Chu-Feng
Shih, Yi-Hong
Lin, Chrong Jung
King, Ya-Chin
License valid from 2017-06-15