Erratum to: An optimizing pipeline stall reduction algorithm for power and performance on multi-core CPUs
Crossref DOI link: https://doi.org/10.1186/s13673-015-0026-1
Published Online: 2015-04-07
Published Print: 2015-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Saravanan, Vijayalakshmi
Anpalagan, Alagan
Pralhaddas, Kothari Dwarkadas
Woungang, Isaac
Text and Data Mining valid from 2015-04-07
Version of Record valid from 2015-04-07
Article History
Received: 25 February 2015
Accepted: 4 March 2015
First Online: 7 April 2015