A BCH error correction scheme applied to FPGA with embedded memory
Crossref DOI link: https://doi.org/10.1631/FITEE.2000323
Published Online: 2021-08-28
Published Print: 2021-08
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Liu, Yang http://orcid.org/0000-0001-8541-8104
Li, Jie http://orcid.org/0000-0002-6488-3696
Wang, Han
Zhang, Debiao
Feng, Kaiqiang
Li, Jinqiang
Text and Data Mining valid from 2021-08-01
Version of Record valid from 2021-08-01
Article History
Received: 5 July 2020
Accepted: 26 December 2020
First Online: 28 August 2021