A Low Power, High Speed 18-Transitor True Single-Phase Clocking D Flip- Flop Design In 90nm Cmos Technology
Crossref DOI link: https://doi.org/10.35940/ijitee.K2531.0981119
Published Online: 2019-09-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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Kasani, Shanti
Raju, Dr. G. R. L. V. N. Srinivasa