Power Quality Event Detection and Classifier Architecture on FPGA for Smart M eters
Crossref DOI link: https://doi.org/10.35940/ijrte.A3027.059120
Published Online: 2020-05-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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E*, Dr. Prathibha.
Alemayehu, Hinsermu
Manjunatha, Dr. A.