Low Power Cmos Vlsi Circuit Layout using Emerging Technologies
Crossref DOI link: https://doi.org/10.35940/ijrte.D8422.118419
Published Online: 2019-11-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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Saifuddin*, K.
Teja, Chakka Ravi
Reddy, Yennapusa.Rajakullai