Ambipolar Reduction Methodology for SOI Tunnel FETs in Low Power Applications: A Performance Report
Crossref DOI link: https://doi.org/10.35940/ijrte.E6271.018520
Published Online: 2020-01-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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Dutta*, Ritam
Paitya, Nitai
Majumdar, Abhishek
