Design and Development of a Very Large Scale Integrated Circuit Architecture for a Digital Image Compression and Realization on Field Programmable Gate Array
Crossref DOI link: https://doi.org/10.35940/ijrte.B7608.018520
Published Online: 2020-01-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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D R, Premachand
Eranna*, U.